<b>Programable resources:</b>
<div class="list styled ok-circle-list">
<ul>
<li>Xilinx Kintex-7 325T FFG900 FPGA</li>
<li>MMC: LPC1764FBD100, optionally Atxmega128A1U-AU</li>
</ul>
</div>
<b>Memory:</b>
<div class="list styled ok-circle-list">
<ul>
<li>2GB (16Gbit) DDR3 SDRAM (32-bit interface), 800MHz (clock)</li>
<li>SPI Flash for FPGA configuration. Accessible by MMC</li>
<li>SPI Flash for user data storage</li>
<li>EEPROM with MAC and unique ID</li>
</ul>
</div>
<b>Conectivity:</b>
<div class="list styled ok-circle-list">
<ul>
<li>2 high pin count (HPC) slots for 2 single width mezzanines or 1 double width mezzanine</li>
<li>Mini-USB connected to the MMC processor</li>
<li>Mini-USB UART connected to FPGA or MMC</li>
<li>Mini-USB connected to the IPMI processor</li>
<li>Stand-alone power connector (12V, 3.3V aux)</li>
<li>SATA connector for Port2, Port3 with possibility of switching to FPGA GTP </li>
<li>GTP connected to FMC1 (x4), FMC2(x4), FP1(x4), FP2(x4), Port0, Port1, RTM(x8), selected by capacitor placement</li>
<li>RTM connector with 8 GTP routed to it. Compatible with rtm-sfp8 module</li>
</ul>
</div>
<b>Supply:</b>
<div class="list styled ok-circle-list">
<ul>
<li>Monitoring of voltage and Power supply for FPGA, memory, FMCs – programmable VADJ 1.8-3.3V (independent for each FMC)</li>
<li>current of all FMC buses</li>
<li>Stand-alone power connector</li>
</ul>
</div>
<b>Clocking:</b>
<div class="list styled ok-circle-list">
<ul>
<li>Clock distribution circuit compatible with White Rabbit</li>
<li>Clock crossbar, 16 inputs x 16 outputs</li>
</ul>
</div>
<b>Other:</b>
<div class="list styled ok-circle-list">
<ul>
<li>Temperature, voltage and current monitoring for critical power buses</li>
<li>Temperature monitoring: FMC1, FMC2, supply, FPGA core, DDR memory</li>
<li>JTAG multiplexer (SCANSTA) for FMC access, local JTAG port and remote debug/Chipscope via Ethernet</li>
</ul>
</div>
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