DI/OT Zynq Ultrascale-based System Board with White Rabbit support
The DI/OT System Board is one of the main components of the Distributed I/O Tier project ecosystem.
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The DI/OT System Board is one of the main components of the Distributed I/O Tier project ecosystem. It is mechanically and electrically compliant with the Compact PCI Serial standard (CPCI-S.0). As part of the integration with the Sinara ecosystem for quantum physics experiments, DI/OT System Board will have two executions to serve both CERN and Sinara requirements.
The DI/OT System Board controls the whole DI/OT crate, communicating with up to 8 Peripheral Boards and higher layers of the control system using White Rabbit, Gigabit Ethernet or any other industrial fieldbus.
Technical parameters
General information
Board features:
- Xilinx Zynq UltraScale+ SoC (XCZU7CG-1FFVF1517E)
- 4GB DDR4 memory with ECC for Processing System (ARM processor)
- 1GB DDR4 memory for FPGA Programmable Logic
- 4GB eMMC and 64MB QSPI Flash
- MicroSD card slot
- SFP for 1/10Gb Ethernet and White Rabbit support
- FMC slot with high pin count (HPC) connector
- Vadj 1.8V
- LA bank connected to FPGA (HA, HB banks not available)
- 8 MGT Tx/Rx lanes connected to FPGA GTH
- DI/OT backplane connectors
- 287 FPGA I/Os
- 8 MGTs (1 per Peripheral Slot)
- Low skew clock distribution from programmable Si5341 generator
- DI/OT crate control/monitoring I/Os
Download
More technical information about the System Board: https://ohwr.org/project/diot-sb-zu/wikis/home
More technical information about the DI/OT project: https://ohwr.org/project/diot/wikis/home
The overview photo: https://ohwr.org/project/diot-sb-zu/wikis/home
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